Masked Interrupt Status Register
| M_RE_INT | Response Errors |
| M_CC_INT | Command Complete |
| M_DTC_INT | Data Transfer Complete |
| M_DTR_INT | Data Transmit Request |
| M_DRR_INT | Data Receive Request |
| M_RCE_INT | Response CRC Error |
| M_DCE_INT | Data CRC Error |
| M_RTO_BACK_INT | Response Timeout/Boot ACK Received |
| M_DTO_BDS_INT | Data Timeout/Boot Data Start |
| M_DSTO_VSD_INT | Data Starvation Timeout/V1.8 Switch Done |
| M_FU_FO_INT | FIFO Underrun/Overflow |
| M_CB_IW_INT | Command Busy and Illegal Write |
| M_DSE_BC_INT | Data Start Error/Busy Clear |
| M_ACD_INT | Auto Command Done |
| M_DEE_INT | Data End-bit Error |
| M_SDIO_INT | SDIO Interrupt |
| M_CARD_INSERT | Card Inserted |
| M_CARD_REMOVAL_INT | Card Removed |